Semester
Fall
Date of Graduation
2010
Document Type
Thesis
Degree Type
MS
College
Statler College of Engineering and Mineral Resources
Department
Lane Department of Computer Science and Electrical Engineering
Committee Chair
David W. Graham.
Abstract
Floating-gate transistors have proven to be extremely useful devices in the development of analog systems; however, the inability to properly simulate these devices has held back their adoption. The objective of this work was to develop a complete simulation model for a floating-gate (FG) MOSFET using both standard SPICE primitives and also MOSFET models taken directly from foundry characterizations. This new simulation model will give analog designers the ability simulate all aspects of floating-gate device operation including transient, AC and DC characteristics. This work describes the development of this model and demonstrates its use in various applications.
Recommended Citation
Rapp, Steven Joseph, "A Comprehensive Simulation Model for Floating Gate Transistors" (2010). Graduate Theses, Dissertations, and Problem Reports. 3064.
https://researchrepository.wvu.edu/etd/3064