Date of Graduation


Document Type


Degree Type



Statler College of Engineering and Mineral Resources


Lane Department of Computer Science and Electrical Engineering

Committee Chair

David W. Graham

Committee Member

Roy S. Nutter

Committee Member

Hany H. Ammar

Committee Member

Brian D. Woerner

Committee Member

Debangsu Bhattacharyya


Since they were introduced, floating-gate (FG) transistors have been used as non-volatile digital memory. Recent research has shown that floating-gate transistors can be successfully used as analog memory, specifically as programmable voltage and current sources. However, their proliferation has been limited due to the complex programming procedure and the complex testing equipment. Analog applications such as field-programmable analog arrays (FPAAs) require hundreds to thousands of floating-gate transistors on a single chip which makes the programming process even more complicated and very challenging. Therefore, a simplified, compact, and low-power scheme to program FGs are necessary. This work presents an improved version of the typical methodology for FG programming. Additionally, a novel programming methodology that utilizes negative voltages is presented here. This method simplifies the programming process by eliminating the use of supplementary and complicated infrastructure circuits, which makes the FG transistor a good candidate for low-power wireless sensor nodes and portable systems.